47 lines
972 B
Text
47 lines
972 B
Text
Binding for SIRF GNSS receiver control driver
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GPIO pins are toggled to control GNSS receiver power states either to
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wake it from sleep or put receiver into sleep mode
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Required properties:
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- compatible: must be "qcom,gnss_sirf"
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- #gpio-pins:
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0: GPIO 18
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1: GPIO 87
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Example:
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ss5_pwr_ctrl0 {
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compatible = "qcom,gnss_sirf";
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pinctrl-0 = <&ss5_pwr_ctrl_rst_on>;
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ssVreset-gpio = <&tlmm 87 1>;
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ssVonoff-gpio = <&tlmm 18 1>;
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};
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ss5_pwr_ctrl_pins: ss5_pwr_ctrl_pins {
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ss5_pwr_ctrl_rst_on: ss5_pwr_ctrl_rst_on {
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mux {
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pins = "gpio87", "gpio18";
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function = "gpio";
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};
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config {
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pins = "gpio87", "gpio18";
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drive-strength = <16>; /* 16 mA */
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bias-pull-up;
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output-high;
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};
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};
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ss5_pwr_ctrl_rst_off: ss5_pwr_ctrl_off {
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mux {
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pins = "gpio87", "gpio18";
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function = "gpio";
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};
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config {
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pins = "gpio87", "gpio18";
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drive-strength = <16>; /* 16 mA */
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bias-pull-up;
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output-high;
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};
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};
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};
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