&soc { stm: stm@24002000 { compatible = "arm,primecell"; arm,primecell-periphid = <0x000bb962>; reg = <0x24002000 0x1000>, <0x16280000 0x180000>; reg-names = "stm-base", "stm-stimulus-base"; atid = <16>; coresight-name = "coresight-stm"; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; out-ports { port { stm_out_funnel_in0: endpoint { remote-endpoint = <&funnel_in0_in_stm>; }; }; }; }; snoc: snoc { compatible = "qcom,coresight-dummy"; coresight-name = "coresight-snoc"; qcom,dummy-source; atid = <125>; out-ports { port { snoc_out_funnel_in0: endpoint { remote-endpoint = <&funnel_in0_in_snoc>; }; }; }; }; csr: csr@24001000 { compatible = "qcom,coresight-csr"; reg = <0x24001000 0x1000>; reg-names = "csr-base"; coresight-name = "coresight-csr"; qcom,usb-bam-support; qcom,hwctrl-set-support; qcom,set-byte-cntr-support; qcom,blk-size = <1>; }; swao_csr: csr@24b11000 { compatible = "qcom,coresight-csr"; reg = <0x24b11000 0x1000>, <0x24b110f8 0x50>; reg-names = "csr-base", "msr-base"; coresight-name = "coresight-swao-csr"; qcom,timestamp-support; qcom,msr-support; qcom,blk-size = <1>; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; }; etr1_csr: csr@2405c000 { compatible = "qcom,coresight-csr"; reg = <0x2405c000 0x1000>; reg-names = "csr-base"; status = "disabled"; coresight-name = "coresight-etr1-csr"; }; tpdm_swao_prio0: tpdm@24b09000 { compatible = "arm,primecell"; arm,primecell-periphid = <0x000bb968>; reg = <0x24b09000 0x1000>; reg-names = "tpdm-base"; coresight-name = "coresight-tpdm-swao-prio-0"; atid = <71>; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; out-ports { port { tpdm_swao_prio0_out_tpda_aoss: endpoint { remote-endpoint = <&tpda_aoss_in_tpdm_swao_prio0>; }; }; }; }; tpdm_swao_prio1: tpdm@24b0a000 { compatible = "arm,primecell"; arm,primecell-periphid = <0x000bb968>; reg = <0x24b0a000 0x1000>; reg-names = "tpdm-base"; coresight-name = "coresight-tpdm-swao-prio-1"; atid = <71>; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; out-ports { port { tpdm_swao_prio1_out_tpda_aoss: endpoint { remote-endpoint = <&tpda_aoss_in_tpdm_swao_prio1>; }; }; }; }; tpdm_swao_prio2: tpdm@24b0b000 { compatible = "arm,primecell"; arm,primecell-periphid = <0x000bb968>; reg = <0x24b0b000 0x1000>; reg-names = "tpdm-base"; coresight-name = "coresight-tpdm-swao-prio-2"; atid = <71>; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; out-ports { port { tpdm_swao_prio2_out_tpda_aoss: endpoint { remote-endpoint = <&tpda_aoss_in_tpdm_swao_prio2>; }; }; }; }; tpdm_swao_prio3: tpdm@24b0c000 { compatible = "arm,primecell"; arm,primecell-periphid = <0x000bb968>; reg = <0x24b0c000 0x1000>; reg-names = "tpdm-base"; coresight-name = "coresight-tpdm-swao-prio-3"; atid = <71>; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; out-ports { port { tpdm_swao_prio3_out_tpda_aoss: endpoint { remote-endpoint = <&tpda_aoss_in_tpdm_swao_prio3>; }; }; }; }; tpdm_ddr_ch0: tpdm@24d20000 { compatible = "arm,primecell"; arm,primecell-periphid = <0x000bb968>; reg = <0x24d20000 0x1000>; reg-names = "tpdm-base"; coresight-name = "coresight-tpdm-ddr-ch0_1"; atid = <78>; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; out-ports { port { tpdm_ddr_ch0_out_funnel_ddr_ch0: endpoint { remote-endpoint = <&funnel_ddr_ch0_in_tpdm_ddr_ch0>; }; }; }; }; tpdm_ddr: tpdm@24d00000 { compatible = "arm,primecell"; arm,primecell-periphid = <0x000bb968>; reg = <0x24d00000 0x1000>; reg-names = "tpdm-base"; coresight-name = "coresight-tpdm-ddr"; atid = <78>; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; status = "disabled"; out-ports { port { tpdm_ddr_out_funnel_ddr0: endpoint { remote-endpoint = <&funnel_ddr0_in_tpdm_ddr>; }; }; }; }; tpdm_mvm: tpdm@24980000 { compatible = "arm,primecell"; arm,primecell-periphid = <0x000bb968>; reg = <0x24980000 0x1000>; reg-names = "tpdm-base"; coresight-name = "coresight-tpdm-mvm"; atid = <78>; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; status = "disabled"; out-ports { port { tpdm_mvm_out_funnel_mvm: endpoint { remote-endpoint = <&funnel_mvm_in_tpdm_mvm>; }; }; }; }; tpdm_prng: tpdm@24854000 { compatible = "arm,primecell"; arm,primecell-periphid = <0x000bb968>; reg = <0x24854000 0x1000>; reg-names = "tpdm-base"; coresight-name = "coresight-tpdm-prng"; atid = <78>; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; out-ports { port { tpdm_prng_out_tpda_dl_center_19: endpoint { remote-endpoint = <&tpda_dl_center_19_in_tpdm_prng>; }; }; }; }; tpdm_qm: tpdm@24c00000 { compatible = "arm,primecell"; arm,primecell-periphid = <0x000bb968>; reg = <0x24c00000 0x1000>; reg-names = "tpdm-base"; coresight-name = "coresight-tpdm-qm"; atid = <78>; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; out-ports { port { tpdm_qm_out_tpda_dl_center: endpoint { remote-endpoint = <&tpda_dl_center_in_tpdm_qm>; }; }; }; }; tpdm_vsense: tpdm@24840000 { compatible = "arm,primecell"; arm,primecell-periphid = <0x000bb968>; reg = <0x24840000 0x1000>; reg-names = "tpdm-base"; coresight-name = "coresight-tpdm-vsense"; atid = <78>; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; out-ports { port { tpdm_vsense_out_tpda_dl_center: endpoint { remote-endpoint = <&tpda_dl_center_in_tpdm_vsense>; }; }; }; }; tpdm_dlct0: tpdm@24c28000 { compatible = "arm,primecell"; arm,primecell-periphid = <0x000bb968>; reg = <0x24c28000 0x1000>; reg-names = "tpdm-base"; coresight-name = "coresight-tpdm-dlct"; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; atid = <78>; out-ports { port { tpdm_dl_ct0_out_tpda_dl_center: endpoint { remote-endpoint = <&tpda_dl_center_in_tpdm_dl_ct0>; }; }; }; }; tpdm_dlct1: tpdm@24c29000 { compatible = "arm,primecell"; arm,primecell-periphid = <0x000bb968>; reg = <0x24c29000 0x1000>; reg-names = "tpdm-base"; coresight-name = "coresight-tpdm-ipcc"; atid = <78>; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; out-ports { port { tpdm_dl_ct1_out_tpda_dl_center: endpoint { remote-endpoint = <&tpda_dl_center_in_tpdm_dl_ct1>; }; }; }; }; tpdm_swao: tpdm@24b0d000 { compatible = "arm,primecell"; arm,primecell-periphid = <0x000bb968>; reg = <0x24b0d000 0x1000>; reg-names = "tpdm-base"; coresight-name = "coresight-tpdm-swao"; atid = <71>; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; out-ports { port { tpdm_swao_out_tpda_aoss: endpoint { remote-endpoint = <&tpda_aoss_in_tpdm_swao>; }; }; }; }; tpdm_spdm: tpdm@2400f000 { compatible = "arm,primecell"; arm,primecell-periphid = <0x000bb968>; reg = <0x2400f000 0x1000>; reg-names = "tpdm-base"; coresight-name = "coresight-tpdm-spdm"; atid = <65>; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; out-ports { port { tpdm_spdm_out_tpda_qdss: endpoint { remote-endpoint = <&tpda_qdss_in_tpdm_spdm>; }; }; }; }; tpdm_dcc: tpdm@24003000 { compatible = "arm,primecell"; arm,primecell-periphid = <0x000bb968>; reg = <0x24003000 0x1000>; reg-names = "tpdm-base"; coresight-name = "coresight-tpdm-dcc"; atid = <65>; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; qcom,hw-enable-check; out-ports { port { tpdm_dcc_out_tpda_qdss: endpoint { remote-endpoint = <&tpda_qdss_in_tpdm_dcc>; }; }; }; }; tpdm_llm_silver: tpdm@268a0000 { compatible = "arm,primecell"; arm,primecell-periphid = <0x000bb968>; reg = <0x268a0000 0x1000>; reg-names = "tpdm-base"; coresight-name = "coresight-tpdm-llm-silver"; atid = <66>; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; out-ports { port { tpdm_llm_silver_out_tpda_apss: endpoint { remote-endpoint = <&tpda_apss_in_tpdm_llm_silver>; }; }; }; }; tpdm_apss0: tpdm@26860000 { compatible = "arm,primecell"; arm,primecell-periphid = <0x000bb968>; reg = <0x26860000 0x1000>; reg-names = "tpdm-base"; coresight-name = "coresight-tpdm-actpm"; atid = <66>; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; out-ports { port { tpdm_apss0_out_tpda_apss: endpoint { remote-endpoint = <&tpda_apss_in_tpdm_apss0>; }; }; }; }; tpdm_apss1: tpdm@26861000 { compatible = "arm,primecell"; arm,primecell-periphid = <0x000bb968>; reg = <0x26861000 0x1000>; reg-names = "tpdm-base"; coresight-name = "coresight-tpdm-apss"; atid = <66>; status = "disabled"; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; out-ports { port { tpdm_apss1_out_tpda_apss: endpoint { remote-endpoint = <&tpda_apss_in_tpdm_apss1>; }; }; }; }; tpdm_sdcc5: tpdm@24c20000 { compatible = "arm,primecell"; arm,primecell-periphid = <0x000bb968>; reg = <0x24c20000 0x1000>; reg-names = "tpdm-base"; coresight-name = "coresight-tpdm-sdcc5"; atid = <78>; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; qcom,cmb-msr-skip; status = "disabled"; out-ports { port { tpdm_sdcc5_out_tpda_dl_center: endpoint { remote-endpoint = <&tpda_dl_center_in_tpdm_sdcc5>; }; }; }; }; tpdm_sdcc4: tpdm@24c21000 { compatible = "arm,primecell"; arm,primecell-periphid = <0x000bb968>; reg = <0x24c21000 0x1000>; reg-names = "tpdm-base"; coresight-name = "coresight-tpdm-sdcc4"; atid = <78>; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; qcom,cmb-msr-skip; status = "disabled"; out-ports { port { tpdm_sdcc4_out_tpda_dl_center_5: endpoint { remote-endpoint = <&tpda_dl_center_5_in_tpdm_sdcc4>; }; }; }; }; tpdm_ipa: tpdm@24c22000 { compatible = "arm,primecell"; arm,primecell-periphid = <0x000bb968>; reg = <0x24c22000 0x1000>; reg-names = "tpdm-base"; coresight-name = "coresight-tpdm-ipa"; atid = <78>; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; status = "disabled"; out-ports { port { tpdm_ipa_out_tpda_dl_center: endpoint { remote-endpoint = <&tpda_dl_center_in_tpdm_ipa>; }; }; }; }; tpdm_tmess_prng: tpdm@24cc9000 { compatible = "arm,primecell"; arm,primecell-periphid = <0x000bb968>; reg = <0x24cc9000 0x1000>; reg-names = "tpdm-base"; coresight-name = "coresight-tpdm-tmess-prng"; atid = <85>; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; status = "disabled"; out-ports { port { tpdm_tmess_prng_out_tpda_tmess: endpoint { remote-endpoint = <&tpda_tmess_in_tpdm_tmess_prng>; }; }; }; }; tpdm_tmess1: tpdm@24cc1000 { compatible = "arm,primecell"; arm,primecell-periphid = <0x000bb968>; reg = <0x24cc1000 0x1000>; reg-names = "tpdm-base"; coresight-name = "coresight-tpdm-tmess-1"; atid = <85>; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; out-ports { port { tpdm_tmess0_out_tpda_tmess: endpoint { remote-endpoint = <&tpda_tmess_in_tpdm_tmess0>; }; }; }; }; tpdm_tmess0: tpdm@24cc0000 { compatible = "arm,primecell"; arm,primecell-periphid = <0x000bb968>; reg = <0x24cc0000 0x1000>; reg-names = "tpdm-base"; coresight-name = "coresight-tpdm-tmess-0"; atid = <85>; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; out-ports { port { tpdm_tmess1_out_tpda_tmess: endpoint { remote-endpoint = <&tpda_tmess_in_tpdm_tmess1>; }; }; }; }; tpdm_rscc: tpdm@24c08000 { compatible = "arm,primecell"; arm,primecell-periphid = <0x000bb968>; reg = <0x24c08000 0x1000>; reg-names = "tpdm-base"; coresight-name = "coresight-tpdm-pcie-rscc"; atid = <88>; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; qcom,cmb-msr-skip; status = "disabled"; out-ports { port { tpdm_rscc_out_tpda_rscc: endpoint { remote-endpoint = <&tpda_rscc_in_tpdm_rscc>; }; }; }; }; tpdm_modem_0: tpdm@24800000 { compatible = "arm,primecell"; arm,primecell-periphid = <0x000bb968>; reg = <0x24800000 0x1000>; reg-names = "tpdm-base"; atid = <67>; coresight-name = "coresight-tpdm-modem-dsb"; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; out-ports { port { tpdm_modem_0_out_tpda_modem_0: endpoint { remote-endpoint = <&tpda_modem_0_in_tpdm_modem_0>; }; }; }; }; tpdm_modem_1: tpdm@24801000 { compatible = "arm,primecell"; arm,primecell-periphid = <0x000bb968>; reg = <0x24801000 0x1000>; reg-names = "tpdm-base"; status = "disabled"; atid = <67>; coresight-name = "coresight-tpdm-modem-mcmb"; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; out-ports { port { tpdm_modem_1_out_tpda_modem_1: endpoint { remote-endpoint = <&tpda_modem_1_in_tpdm_modem_1>; }; }; }; }; tpdm_modem_3: tpdm@2480d000 { compatible = "arm,primecell"; arm,primecell-periphid = <0x000bb968>; reg = <0x2480d000 0x1000>; reg-names = "tpdm-base"; status = "disabled"; atid = <87>; coresight-name = "coresight-tpdm-modem-rscc"; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; out-ports { port { tpdm_modem_3_out_tpda_modem_crm: endpoint { remote-endpoint = <&tpda_modem_crm_in_tpdm_modem_3>; }; }; }; }; modem_etm0 { compatible = "qcom,coresight-remote-etm"; coresight-name = "coresight-modem-etm0"; qcom,inst-id = <2>; atid = <36 37>; out-ports { port { modem_etm0_out_funnel_modem_q6_dup: endpoint { remote-endpoint = <&funnel_modem_q6_dup_in_modem_etm0>; }; }; }; }; modem2_etm0 { compatible = "qcom,coresight-remote-etm"; coresight-name = "coresight-modem2-etm0"; qcom,inst-id = <11>; atid = <39>; out-ports { port { modem2_etm0_out_funnel_modem: endpoint { remote-endpoint = <&funnel_modem_in_modem2_etm0>; }; }; }; }; modem_diag: modem_diag { compatible = "qcom,coresight-dummy"; coresight-name = "coresight-modem-diag"; qcom,dummy-source; atid = <50>; out-ports { port { modem_diag_out_funnel_modem_q6: endpoint { remote-endpoint = <&funnel_modem_q6_in_modem_diag>; }; }; }; }; funnel_mvm: funnel@24983000 { compatible = "arm,primecell"; arm,primecell-periphid = <0x000bb908>; reg = <0x24983000 0x1000>; reg-names = "funnel-base"; coresight-name = "coresight-funnel-mvm"; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; status = "disabled"; in-ports { #address-cells = <1>; #size-cells = <0>; port@0 { reg = <0>; funnel_mvm_in_tpdm_mvm: endpoint { remote-endpoint = <&tpdm_mvm_out_funnel_mvm>; }; }; }; out-ports { port { funnel_mvm_out_tpda_dl_center_15: endpoint { remote-endpoint = <&tpda_dl_center_15_in_funnel_mvm>; }; }; }; }; funnel_ddr_ch0: funnel@24d22000 { compatible = "arm,primecell"; arm,primecell-periphid = <0x000bb908>; reg = <0x24d22000 0x1000>; reg-names = "funnel-base"; coresight-name = "coresight-funnel-ddr_ch0"; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; in-ports { #address-cells = <1>; #size-cells = <0>; port@0 { reg = <0>; funnel_ddr_ch0_in_tpdm_ddr_ch0: endpoint { remote-endpoint = <&tpdm_ddr_ch0_out_funnel_ddr_ch0>; }; }; }; out-ports { port { funnel_ddr_ch0_out_funnel_ddr0: endpoint { remote-endpoint = <&funnel_ddr0_in_funnel_ddr_ch0>; }; }; }; }; funnel_ddr0: funnel@24d03000 { compatible = "arm,primecell"; arm,primecell-periphid = <0x000bb908>; reg = <0x24d03000 0x1000>; reg-names = "funnel-base"; coresight-name = "coresight-funnel-ddr0"; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; in-ports { #address-cells = <1>; #size-cells = <0>; port@0 { reg = <0>; funnel_ddr0_in_funnel_ddr_ch0: endpoint { remote-endpoint = <&funnel_ddr_ch0_out_funnel_ddr0>; }; }; port@2 { reg = <2>; funnel_ddr0_in_tpdm_ddr: endpoint { remote-endpoint = <&tpdm_ddr_out_funnel_ddr0>; }; }; }; out-ports { #address-cells = <1>; #size-cells = <0>; port@0 { reg = <0>; funnel_ddr0_out_tpda_dl_center_9: endpoint { remote-endpoint = <&tpda_dl_center_9_in_funnel_ddr0>; source = <&tpdm_ddr_ch0>; }; }; port@1 { reg = <1>; funnel_ddr0_out_tpda_dl_center_11: endpoint { remote-endpoint = <&tpda_dl_center_11_in_funnel_ddr0>; source = <&tpdm_ddr>; }; }; }; }; funnel_modem_q6_dup: funnel@2480d000 { compatible = "arm,primecell"; arm,primecell-periphid = <0x000bb908>; reg = <0x2480d000 0x1000>, <0x2480c000 0x1000>; reg-names = "funnel-base-dummy", "funnel-base-real"; coresight-name = "coresight-funnel-modem_q6_dup"; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; qcom,duplicate-funnel; in-ports { #address-cells = <1>; #size-cells = <0>; port@0 { reg = <0>; funnel_modem_q6_dup_in_modem_etm0: endpoint { remote-endpoint = <&modem_etm0_out_funnel_modem_q6_dup>; }; }; }; out-ports { port { funnel_modem_q6_dup_out_funnel_modem_q6: endpoint { remote-endpoint = <&funnel_modem_q6_in_funnel_modem_q6_dup>; }; }; }; }; funnel_modem_q6: funnel@2480c000 { compatible = "arm,primecell"; arm,primecell-periphid = <0x000bb908>; reg = <0x2480c000 0x1000>; reg-names = "funnel-base"; coresight-name = "coresight-funnel-modem_q6"; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; in-ports { #address-cells = <1>; #size-cells = <0>; port@1 { reg = <1>; funnel_modem_q6_in_funnel_modem_q6_dup: endpoint { remote-endpoint = <&funnel_modem_q6_dup_out_funnel_modem_q6>; }; }; port@2 { reg = <2>; funnel_modem_q6_in_modem_diag: endpoint { remote-endpoint = <&modem_diag_out_funnel_modem_q6>; }; }; port@3 { reg = <3>; funnel_modem_q6_in_tpda_modem_crm: endpoint { remote-endpoint = <&tpda_modem_crm_out_funnel_modem_q6>; }; }; }; out-ports { port { funnel_modem_q6_out_funnel_modem: endpoint { remote-endpoint = <&funnel_modem_in_funnel_modem_q6>; }; }; }; }; funnel_modem: funnel@24804000 { compatible = "arm,primecell"; arm,primecell-periphid = <0x000bb908>; reg = <0x24804000 0x1000>; reg-names = "funnel-base"; coresight-name = "coresight-funnel-modem"; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; in-ports { #address-cells = <1>; #size-cells = <0>; port@1 { reg = <1>; funnel_modem_in_modem2_etm0: endpoint { remote-endpoint = <&modem2_etm0_out_funnel_modem>; }; }; port@0 { reg = <0>; funnel_modem_in_tpda_modem: endpoint { remote-endpoint = <&tpda_modem_out_funnel_modem>; }; }; port@3 { reg = <3>; funnel_modem_in_funnel_modem_q6: endpoint { remote-endpoint = <&funnel_modem_q6_out_funnel_modem>; }; }; }; out-ports { port { funnel_modem_out_funnel_in1: endpoint { remote-endpoint = <&funnel_in1_in_funnel_modem>; }; }; }; }; tpda_modem: tpda@24803000 { compatible = "arm,primecell"; arm,primecell-periphid = <0x000bb969>; reg = <0x24803000 0x1000>; reg-names = "tpda-base"; qcom,tpda-atid = <67>; qcom,dsb-elem-size = <0 32>; qcom,cmb-elem-size = <1 64>; coresight-name = "coresight-tpda-modem"; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; in-ports { #address-cells = <1>; #size-cells = <0>; port@0 { reg = <0>; tpda_modem_0_in_tpdm_modem_0: endpoint { remote-endpoint = <&tpdm_modem_0_out_tpda_modem_0>; }; }; port@1 { reg = <1>; tpda_modem_1_in_tpdm_modem_1: endpoint { remote-endpoint = <&tpdm_modem_1_out_tpda_modem_1>; }; }; }; out-ports { port { tpda_modem_out_funnel_modem: endpoint { remote-endpoint = <&funnel_modem_in_tpda_modem>; }; }; }; }; tpda_modem_crm: tpda@2480e000 { compatible = "arm,primecell"; arm,primecell-periphid = <0x000bb969>; reg = <0x2480e000 0x1000>; reg-names = "tpda-base"; qcom,tpda-atid = <87>; qcom,cmb-elem-size = <0 64>; coresight-name = "coresight-tpda-modem-rscc"; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; in-ports { #address-cells = <1>; #size-cells = <0>; port@0 { reg = <0>; tpda_modem_crm_in_tpdm_modem_3: endpoint { remote-endpoint = <&tpdm_modem_3_out_tpda_modem_crm>; }; }; }; out-ports { port { tpda_modem_crm_out_funnel_modem_q6: endpoint { remote-endpoint = <&funnel_modem_q6_in_tpda_modem_crm>; }; }; }; }; tpda_pcie_rscc: tpda@24c09000 { compatible = "arm,primecell"; arm,primecell-periphid = <0x000bb969>; reg = <0x24c09000 0x1000>; reg-names = "tpda-base"; qcom,tpda-atid = <88>; qcom,cmb-elem-size = <0 8>; coresight-name = "coresight-tpda-pcie-rscc"; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; in-ports { #address-cells = <1>; #size-cells = <0>; port@0 { reg = <0>; tpda_rscc_in_tpdm_rscc: endpoint { remote-endpoint = <&tpdm_rscc_out_tpda_rscc>; }; }; }; out-ports { port { tpda_rscc_out_funnel_in0: endpoint { remote-endpoint = <&funnel_in0_in_tpda_rscc>; }; }; }; }; tpda_tmess: tpda@24cc4000 { compatible = "arm,primecell"; arm,primecell-periphid = <0x000bb969>; reg = <0x24cc4000 0x1000>; reg-names = "tpda-base"; coresight-name = "coresight-tpda-tmess"; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; qcom,tpda-atid = <85>; qcom,dsb-elem-size = <2 32>; qcom,cmb-elem-size = <0 32>, <1 32>, <2 64>; in-ports { #address-cells = <1>; #size-cells = <0>; port@0 { reg = <0>; tpda_tmess_in_tpdm_tmess_prng: endpoint { remote-endpoint = <&tpdm_tmess_prng_out_tpda_tmess>; }; }; port@1 { reg = <1>; tpda_tmess_in_tpdm_tmess1: endpoint { remote-endpoint = <&tpdm_tmess1_out_tpda_tmess>; }; }; port@2 { reg = <2>; tpda_tmess_in_tpdm_tmess0: endpoint { remote-endpoint = <&tpdm_tmess0_out_tpda_tmess>; }; }; }; out-ports { port { tpda_tmess_out_funnel_tmess: endpoint { remote-endpoint = <&funnel_tmess_in_tpda_tmess>; }; }; }; }; funnel_tmess: funnel@24cc5000 { compatible = "arm,primecell"; arm,primecell-periphid = <0x000bb908>; reg = <0x24cc5000 0x1000>; reg-names = "funnel-base"; coresight-name = "coresight-funnel-tmess"; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; in-ports { #address-cells = <1>; #size-cells = <0>; port@0 { reg = <0>; funnel_tmess_in_tpda_tmess: endpoint { remote-endpoint = <&tpda_tmess_out_funnel_tmess>; }; }; }; out-ports { port { funnel_tmess_out_funnel_in1: endpoint { remote-endpoint = <&funnel_in1_in_funnel_tmess>; }; }; }; }; tpda_apss: tpda@26863000 { compatible = "arm,primecell"; arm,primecell-periphid = <0x000bb969>; reg = <0x26863000 0x1000>; reg-names = "tpda-base"; coresight-name = "coresight-tpda-apss"; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; qcom,tpda-atid = <66>; qcom,dsb-elem-size = <4 32>; qcom,cmb-elem-size = <0 32>, <3 64>; in-ports { #address-cells = <1>; #size-cells = <0>; port@0 { reg = <0>; tpda_apss_in_tpdm_llm_silver: endpoint { remote-endpoint = <&tpdm_llm_silver_out_tpda_apss>; }; }; port@3 { reg = <3>; tpda_apss_in_tpdm_apss0: endpoint { remote-endpoint = <&tpdm_apss0_out_tpda_apss>; }; }; port@4 { reg = <4>; tpda_apss_in_tpdm_apss1: endpoint { remote-endpoint = <&tpdm_apss1_out_tpda_apss>; }; }; }; out-ports { port { tpda_apss_out_funnel_apss: endpoint { remote-endpoint = <&funnel_apss_in_tpda_apss>; }; }; }; }; ipcb_tgu: tgu@24b0e000 { compatible = "arm,primecell"; arm,primecell-periphid = <0x000bb999>; reg = <0x24b0e000 0x1000>; reg-names = "tgu-base"; tgu-steps = <3>; tgu-conditions = <4>; tgu-regs = <4>; tgu-timer-counters = <8>; coresight-name = "coresight-tgu-ipcb"; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; }; spmi_tgu0: tgu@24b0f000 { compatible = "arm,primecell"; arm,primecell-periphid = <0x000bb999>; reg = <0x24b0f000 0x1000>; reg-names = "tgu-base"; tgu-steps = <3>; tgu-conditions = <4>; tgu-regs = <9>; tgu-timer-counters = <8>; coresight-name = "coresight-tgu-spmi0"; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; }; spmi_tgu1: tgu@24b10000 { compatible = "arm,primecell"; arm,primecell-periphid = <0x000bb999>; reg = <0x24b10000 0x1000>; reg-names = "tgu-base"; tgu-steps = <3>; tgu-conditions = <4>; tgu-regs = <9>; tgu-timer-counters = <8>; coresight-name = "coresight-tgu-spmi1"; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; }; etm0 { compatible = "arm,primecell"; arm,primecell-periphid = <0x000bb95d>; reg = <0x26040000 0x1000>; cpu = <&CPU0>; coresight-name = "coresight-etm0"; qcom,skip-power-up; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; atid = <1>; out-ports { port { ete0_out_funnel_ete: endpoint { remote-endpoint = <&funnel_ete_in_ete0>; }; }; }; }; etm1 { compatible = "arm,primecell"; arm,primecell-periphid = <0x000bb95d>; reg = <0x26140000 0x1000>; cpu = <&CPU1>; coresight-name = "coresight-etm1"; qcom,skip-power-up; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; atid = <2>; out-ports { port { ete1_out_funnel_ete: endpoint { remote-endpoint = <&funnel_ete_in_ete1>; }; }; }; }; etm2 { compatible = "arm,primecell"; arm,primecell-periphid = <0x000bb95d>; reg = <0x26240000 0x1000>; cpu = <&CPU2>; coresight-name = "coresight-etm2"; qcom,skip-power-up; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; atid = <3>; out-ports { port { ete2_out_funnel_ete: endpoint { remote-endpoint = <&funnel_ete_in_ete2>; }; }; }; }; etm3 { compatible = "arm,primecell"; arm,primecell-periphid = <0x000bb95d>; reg = <0x26340000 0x1000>; cpu = <&CPU3>; coresight-name = "coresight-etm3"; qcom,skip-power-up; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; atid = <4>; out-ports { port { ete3_out_funnel_ete: endpoint { remote-endpoint = <&funnel_ete_in_ete3>; }; }; }; }; funnel_apss: funnel@26810000 { compatible = "arm,primecell"; arm,primecell-periphid = <0x000bb908>; reg = <0x26810000 0x1000>; reg-names = "funnel-base"; coresight-name = "coresight-funnel-apss"; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; in-ports { #address-cells = <1>; #size-cells = <0>; port@0 { reg = <0>; funnel_ete_in_ete0: endpoint { remote-endpoint = <&ete0_out_funnel_ete>; }; }; port@1 { reg = <1>; funnel_ete_in_ete1: endpoint { remote-endpoint = <&ete1_out_funnel_ete>; }; }; port@2 { reg = <2>; funnel_ete_in_ete2: endpoint { remote-endpoint = <&ete2_out_funnel_ete>; }; }; port@3 { reg = <3>; funnel_ete_in_ete3: endpoint { remote-endpoint = <&ete3_out_funnel_ete>; }; }; port@6 { reg = <6>; funnel_apss_in_tpda_apss: endpoint { remote-endpoint = <&tpda_apss_out_funnel_apss>; }; }; }; out-ports { port { funnel_apss_out_funnel_in1: endpoint { remote-endpoint = <&funnel_in1_in_funnel_apss>; }; }; }; }; tpda_dlct: tpda@24c2b000 { compatible = "arm,primecell"; arm,primecell-periphid = <0x000bb969>; reg = <0x24c2b000 0x1000>; reg-names = "tpda-base"; coresight-name = "coresight-tpda-dlct"; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; qcom,tpda-atid = <78>; qcom,dsb-elem-size = <9 32>, <11 32>, <15 32>, <20 32>, <21 32>, <23 32>, <26 32>; qcom,cmb-elem-size = <5 32>, <19 32>, <20 32>, <23 64>, <24 32>, <27 64>; in-ports { #address-cells = <1>; #size-cells = <0>; port@5 { reg = <5>; tpda_dl_center_5_in_tpdm_sdcc4: endpoint { remote-endpoint = <&tpdm_sdcc4_out_tpda_dl_center_5>; }; }; port@9 { reg = <9>; tpda_dl_center_9_in_funnel_ddr0: endpoint { remote-endpoint = <&funnel_ddr0_out_tpda_dl_center_9>; }; }; port@11 { reg = <11>; tpda_dl_center_11_in_funnel_ddr0: endpoint { remote-endpoint = <&funnel_ddr0_out_tpda_dl_center_11>; }; }; port@15 { reg = <15>; tpda_dl_center_15_in_funnel_mvm: endpoint { remote-endpoint = <&funnel_mvm_out_tpda_dl_center_15>; }; }; port@19 { reg = <19>; tpda_dl_center_19_in_tpdm_prng: endpoint { remote-endpoint = <&tpdm_prng_out_tpda_dl_center_19>; }; }; port@20 { reg = <20>; tpda_dl_center_in_tpdm_vsense: endpoint { remote-endpoint = <&tpdm_vsense_out_tpda_dl_center>; }; }; port@21 { reg = <21>; tpda_dl_center_in_tpdm_qm: endpoint { remote-endpoint = <&tpdm_qm_out_tpda_dl_center>; }; }; port@23 { reg = <23>; tpda_dl_center_in_tpdm_ipa: endpoint { remote-endpoint = <&tpdm_ipa_out_tpda_dl_center>; }; }; port@24 { reg = <24>; tpda_dl_center_in_tpdm_sdcc5: endpoint { remote-endpoint = <&tpdm_sdcc5_out_tpda_dl_center>; }; }; port@26 { reg = <26>; tpda_dl_center_in_tpdm_dl_ct0: endpoint { remote-endpoint = <&tpdm_dl_ct0_out_tpda_dl_center>; }; }; port@27 { reg = <27>; tpda_dl_center_in_tpdm_dl_ct1: endpoint { remote-endpoint = <&tpdm_dl_ct1_out_tpda_dl_center>; }; }; }; out-ports { port { tpda_dl_center_out_funnel_dl_center: endpoint { remote-endpoint = <&funnel_dl_center_in_tpda_dl_center>; }; }; }; }; funnel_dl_center: funnel@24c2c000 { compatible = "arm,primecell"; arm,primecell-periphid = <0x000bb908>; reg = <0x24c2c000 0x1000>; reg-names = "funnel-base"; coresight-name = "coresight-funnel-dl_center"; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; in-ports { #address-cells = <1>; #size-cells = <0>; port@0 { reg = <0>; funnel_dl_center_in_tpda_dl_center: endpoint { remote-endpoint = <&tpda_dl_center_out_funnel_dl_center>; }; }; }; out-ports { port { funnel_dl_center_out_funnel_in1: endpoint { remote-endpoint = <&funnel_in1_in_funnel_dl_center>; }; }; }; }; tpda_qdss: tpda@24004000 { compatible = "arm,primecell"; arm,primecell-periphid = <0x000bb969>; reg = <0x24004000 0x1000>; reg-names = "tpda-base"; coresight-name = "coresight-tpda-qdss"; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; qcom,tpda-atid = <65>; qcom,cmb-elem-size = <0 32>, <1 32>; in-ports { #address-cells = <1>; #size-cells = <0>; port@1 { reg = <1>; tpda_qdss_in_tpdm_spdm: endpoint { remote-endpoint = <&tpdm_spdm_out_tpda_qdss>; }; }; port@0 { reg = <0>; tpda_qdss_in_tpdm_dcc: endpoint { remote-endpoint = <&tpdm_dcc_out_tpda_qdss>; }; }; }; out-ports { port { tpda_qdss_out_funnel_in0: endpoint { remote-endpoint = <&funnel_in0_in_tpda_qdss>; }; }; }; }; funnel_in0: funnel@24041000 { compatible = "arm,primecell"; arm,primecell-periphid = <0x000bb908>; reg = <0x24041000 0x1000>; reg-names = "funnel-base"; coresight-name = "coresight-funnel-in0"; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; in-ports { #address-cells = <1>; #size-cells = <0>; port@0 { reg = <0>; funnel_in0_in_snoc: endpoint { remote-endpoint = <&snoc_out_funnel_in0>; }; }; port@2 { reg = <2>; funnel_in0_in_tpda_rscc: endpoint { remote-endpoint = <&tpda_rscc_out_funnel_in0>; }; }; port@6 { reg = <6>; funnel_in0_in_tpda_qdss: endpoint { remote-endpoint = <&tpda_qdss_out_funnel_in0>; }; }; port@7 { reg = <7>; funnel_in0_in_stm: endpoint { remote-endpoint = <&stm_out_funnel_in0>; }; }; }; out-ports { port { funnel_in0_out_funnel_merge: endpoint { remote-endpoint = <&funnel_merge_in_funnel_in0>; }; }; }; }; funnel_in1: funnel@24042000 { compatible = "arm,primecell"; arm,primecell-periphid = <0x000bb908>; reg = <0x24042000 0x1000>; reg-names = "funnel-base"; coresight-name = "coresight-funnel-in1"; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; in-ports { #address-cells = <1>; #size-cells = <0>; port@0 { reg = <0>; funnel_in1_in_funnel_tmess: endpoint { remote-endpoint = <&funnel_tmess_out_funnel_in1>; }; }; port@5 { reg = <5>; funnel_in1_in_funnel_modem: endpoint { remote-endpoint = <&funnel_modem_out_funnel_in1>; }; }; port@4 { reg = <4>; funnel_in1_in_funnel_apss: endpoint { remote-endpoint = <&funnel_apss_out_funnel_in1>; }; }; port@6 { reg = <6>; funnel_in1_in_funnel_dl_center: endpoint { remote-endpoint = <&funnel_dl_center_out_funnel_in1>; }; }; }; out-ports { port { funnel_in1_out_funnel_merge: endpoint { remote-endpoint = <&funnel_merge_in_funnel_in1>; }; }; }; }; funnel_merge: funnel@24045000 { compatible = "arm,primecell"; arm,primecell-periphid = <0x000bb908>; reg = <0x24045000 0x1000>; reg-names = "funnel-base"; coresight-name = "coresight-funnel-merge"; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; in-ports { #address-cells = <1>; #size-cells = <0>; port@1 { reg = <1>; funnel_merge_in_funnel_in1: endpoint { remote-endpoint = <&funnel_in1_out_funnel_merge>; }; }; port@0 { reg = <0>; funnel_merge_in_funnel_in0: endpoint { remote-endpoint = <&funnel_in0_out_funnel_merge>; }; }; }; out-ports { port { funnel_merge_out_funnel_aoss: endpoint { remote-endpoint = <&funnel_aoss_in_funnel_merge>; }; }; }; }; tpda_aoss: tpda@24b08000 { compatible = "arm,primecell"; arm,primecell-periphid = <0x000bb969>; reg = <0x24b08000 0x1000>; reg-names = "tpda-base"; coresight-name = "coresight-tpda-aoss"; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; qcom,tpda-atid = <71>; qcom,dsb-elem-size = <4 32>; qcom,cmb-elem-size = <0 64>, <1 64>, <2 64>, <3 64>; in-ports { #address-cells = <1>; #size-cells = <0>; port@1 { reg = <1>; tpda_aoss_in_tpdm_swao_prio1: endpoint { remote-endpoint = <&tpdm_swao_prio1_out_tpda_aoss>; }; }; port@0 { reg = <0>; tpda_aoss_in_tpdm_swao_prio0: endpoint { remote-endpoint = <&tpdm_swao_prio0_out_tpda_aoss>; }; }; port@3 { reg = <3>; tpda_aoss_in_tpdm_swao_prio3: endpoint { remote-endpoint = <&tpdm_swao_prio3_out_tpda_aoss>; }; }; port@2 { reg = <2>; tpda_aoss_in_tpdm_swao_prio2: endpoint { remote-endpoint = <&tpdm_swao_prio2_out_tpda_aoss>; }; }; port@4 { reg = <4>; tpda_aoss_in_tpdm_swao: endpoint { remote-endpoint = <&tpdm_swao_out_tpda_aoss>; }; }; }; out-ports { port { tpda_aoss_out_funnel_aoss: endpoint { remote-endpoint = <&funnel_aoss_in_tpda_aoss>; }; }; }; }; funnel_aoss: funnel@24b04000 { compatible = "arm,primecell"; arm,primecell-periphid = <0x000bb908>; reg = <0x24b04000 0x1000>; reg-names = "funnel-base"; coresight-name = "coresight-funnel-aoss"; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; in-ports { #address-cells = <1>; #size-cells = <0>; port@7 { reg = <7>; funnel_aoss_in_funnel_merge: endpoint { remote-endpoint = <&funnel_merge_out_funnel_aoss>; }; }; port@6 { reg = <6>; funnel_aoss_in_tpda_aoss: endpoint { remote-endpoint = <&tpda_aoss_out_funnel_aoss>; }; }; }; out-ports { port { funnel_aoss_out_tmc_etf: endpoint { remote-endpoint = <&tmc_etf_in_funnel_aoss>; }; }; }; }; dummy_eud: dummy_sink { compatible = "qcom,coresight-dummy"; coresight-name = "coresight-eud"; qcom,dummy-sink; in-ports { port { eud_in_replicator_swao: endpoint { remote-endpoint = <&replicator_swao_out_eud>; }; }; }; }; tmc_etf: tmc@24b05000 { compatible = "arm,primecell"; arm,primecell-periphid = <0x000bb961>; reg = <0x24b05000 0x1000>; reg-names = "tmc-base"; coresight-name = "coresight-tmc-etf"; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; in-ports { port { tmc_etf_in_funnel_aoss: endpoint { remote-endpoint = <&funnel_aoss_out_tmc_etf>; }; }; }; out-ports { port { tmc_etf_out_replicator_swao: endpoint { remote-endpoint = <&replicator_swao_in_tmc_etf>; }; }; }; }; replicator_swao: replicator@24b06000 { compatible = "arm,primecell"; arm,primecell-periphid = <0x000bb909>; reg = <0x24b06000 0x1000>; reg-names = "replicator-base"; coresight-name = "coresight-replicator-swao"; qcom,replicator-loses-context; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; in-ports { port { replicator_swao_in_tmc_etf: endpoint { remote-endpoint = <&tmc_etf_out_replicator_swao>; }; }; }; out-ports { #address-cells = <1>; #size-cells = <0>; port@0 { reg = <0>; replicator_swao_out_replicator_qdss: endpoint { remote-endpoint = <&replicator_qdss_in_replicator_swao>; }; }; port@1 { reg = <1>; replicator_swao_out_eud: endpoint { remote-endpoint = <&eud_in_replicator_swao>; }; }; }; }; replicator_qdss: replicator@24046000 { compatible = "arm,primecell"; arm,primecell-periphid = <0x000bb909>; reg = <0x24046000 0x1000>; reg-names = "replicator-base"; coresight-name = "coresight-replicator-qdss"; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; in-ports { port { replicator_qdss_in_replicator_swao: endpoint { remote-endpoint = <&replicator_swao_out_replicator_qdss>; }; }; }; out-ports { port@0 { replicator_qdss_out_replicator_etr: endpoint { remote-endpoint = <&replicator_etr_in_replicator_qdss>; }; }; }; }; replicator_etr: replicator@2404e000 { compatible = "arm,primecell"; arm,primecell-periphid = <0x000bb909>; reg = <0x2404e000 0x1000>; reg-names = "replicator-base"; coresight-name = "coresight-replicator-etr"; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; in-ports { port { replicator_etr_in_replicator_qdss: endpoint { remote-endpoint = <&replicator_qdss_out_replicator_etr>; }; }; }; out-ports { #address-cells = <1>; #size-cells = <0>; port@0 { reg = <0>; replicator_etr_out_tmc_etr: endpoint { remote-endpoint = <&tmc_etr_in_replicator_etr>; }; }; port@1 { reg = <1>; replicator_etr_out_tmc_etr1: endpoint { remote-endpoint = <&tmc_etr1_in_replicator_etr>; }; }; }; }; tmc_etr: tmc@24048000 { compatible = "arm,primecell"; arm,primecell-periphid = <0x000bb961>; reg = <0x24048000 0x1000>, <0x24064000 0x16000>; reg-names = "tmc-base", "bam-base"; qcom,iommu-dma = "bypass"; iommus = <&apps_smmu 0x0180 0>, <&apps_smmu 0x0160 0>; qcom,iommu-dma-addr-pool = <0x0 0xffc00000>; qcom,sw-usb; dma-coherent; coresight-name = "coresight-tmc-etr"; coresight-csr = <&csr>; csr-atid-offset = <0xf8>; csr-irqctrl-offset = <0x6c>; byte-cntr-name = "byte-cntr"; byte-cntr-class-name = "coresight-tmc-etr-stream"; interrupts = ; interrupt-names = "byte-cntr-irq"; arm,scatter-gather; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; in-ports { port { tmc_etr_in_replicator_etr: endpoint { remote-endpoint = <&replicator_etr_out_tmc_etr>; }; }; }; }; tmc_etr1: tmc@2404f000 { compatible = "arm,primecell"; arm,primecell-periphid = <0x000bb961>; reg = <0x2404f000 0x1000>; reg-names = "tmc-base"; coresight-name = "coresight-tmc-etr1"; iommus = <&apps_smmu 0x01a0 0>; qcom,iommu-dma-addr-pool = <0x0 0xffc00000>; dma-coherent; coresight-csr = <&csr>; csr-atid-offset = <0x108>; csr-irqctrl-offset = <0x70>; byte-cntr-name = "byte-cntr1"; byte-cntr-class-name = "coresight-tmc-etr1-stream"; interrupts = ; interrupt-names = "byte-cntr-irq"; arm,scatter-gather; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; in-ports { port { tmc_etr1_in_replicator_etr: endpoint { remote-endpoint = <&replicator_etr_out_tmc_etr1>; }; }; }; }; qc_cti: cti@24010000 { compatible = "arm,coresight-cti", "arm,primecell"; reg = <0x24010000 0x1000>; arm,primecell-periphid = <0x000bb922>; coresight-name = "coresight-cti-qc_cti"; qcom,extended_cti; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; }; apss_cti: cti@26862000 { compatible = "arm,coresight-cti", "arm,primecell"; reg = <0x26862000 0x1000>; arm,primecell-periphid = <0x000bb922>; coresight-name = "coresight-cti-apss_dl_cti"; qcom,extended_cti; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; }; apss_cti0: cti@268e0000 { compatible = "arm,coresight-cti", "arm,primecell"; reg = <0x268e0000 0x1000>; arm,primecell-periphid = <0x000bb922>; coresight-name = "coresight-cti-apss_cti0"; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; }; apss_cti1: cti@268f0000 { compatible = "arm,coresight-cti", "arm,primecell"; reg = <0x268f0000 0x1000>; arm,primecell-periphid = <0x000bb922>; coresight-name = "coresight-cti-apss_cti1"; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; }; apss_cti2: cti@26900000 { compatible = "arm,coresight-cti", "arm,primecell"; reg = <0x16900000 0x1000>; arm,primecell-periphid = <0x000bb922>; coresight-name = "coresight-cti-apss_cti2"; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; }; cti0: cti@24c2a000 { compatible = "arm,coresight-cti", "arm,primecell"; reg = <0x24c2a000 0x1000>; arm,primecell-periphid = <0x000bb922>; coresight-name = "coresight-cti-cti0"; qcom,extended_cti; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; }; ddr_ch01_dl_cti_0: cti@24d21000 { compatible = "arm,coresight-cti", "arm,primecell"; reg = <0x24d21000 0x1000>; arm,primecell-periphid = <0x000bb922>; coresight-name = "coresight-cti-ddr_ch01_dl_cti_0"; qcom,extended_cti; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; }; ddr_dl_0_cti_0: cti@24d02000 { compatible = "arm,coresight-cti", "arm,primecell"; reg = <0x24d02000 0x1000>; arm,primecell-periphid = <0x000bb922>; coresight-name = "coresight-cti-ddr_dl_0_cti_0"; qcom,extended_cti; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; }; ddr_dl_1_cti_0: cti@24d08000 { compatible = "arm,coresight-cti", "arm,primecell"; reg = <0x24d08000 0x1000>; arm,primecell-periphid = <0x000bb922>; coresight-name = "coresight-cti-ddr_dl_1_cti_0"; qcom,extended_cti; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; }; riscv_cti: cti@2682b000 { compatible = "arm,coresight-cti", "arm,primecell"; reg = <0x2682b000 0x1000>; arm,primecell-periphid = <0x000bb922>; coresight-name = "coresight-cti-riscv_cti"; status = "disabled"; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; }; swao_cti: cti@24b00000 { compatible = "arm,coresight-cti", "arm,primecell"; reg = <0x24b00000 0x1000>; arm,primecell-periphid = <0x000bb922>; coresight-name = "coresight-cti-swao_cti"; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; qcom,extended_cti; }; tmess_cpu: cti@24cd1000 { compatible = "arm,coresight-cti", "arm,primecell"; reg = <0x24cd1000 0x1000>; arm,primecell-periphid = <0x000bb922>; coresight-name = "coresight-cti-tmess_cpu"; status = "disabled"; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; }; tmess_cti_0: cti@24cc2000 { compatible = "arm,coresight-cti", "arm,primecell"; reg = <0x24cc2000 0x1000>; arm,primecell-periphid = <0x000bb922>; coresight-name = "coresight-cti-tmess_cti_0"; qcom,extended_cti; status = "disabled"; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; }; tmess_cti_1: cti@24cc3000 { compatible = "arm,coresight-cti", "arm,primecell"; reg = <0x24cc3000 0x1000>; arm,primecell-periphid = <0x000bb922>; coresight-name = "coresight-cti-tmess_cti_1"; qcom,extended_cti; status = "disabled"; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; }; mss_cti: cti@24802000 { compatible = "arm,coresight-cti", "arm,primecell"; reg = <0x24802000 0x1000>; arm,primecell-periphid = <0x000bb922>; coresight-name = "coresight-cti-mss_cti"; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; qcom,extended_cti; }; mss_q6_cti: cti@2480b000 { compatible = "arm,coresight-cti", "arm,primecell"; reg = <0x2480b000 0x1000>; arm,primecell-periphid = <0x000bb922>; coresight-name = "coresight-cti-mss_q6_cti"; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; }; mss_vq6_cti: cti@24813000 { compatible = "arm,coresight-cti", "arm,primecell"; reg = <0x24813000 0x1000>; arm,primecell-periphid = <0x000bb922>; coresight-name = "coresight-cti-mss_vq6_cti"; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; }; vmss_cs_cti: cti@249810000 { compatible = "arm,coresight-cti", "arm,primecell"; reg = <0x24981000 0x1000>; arm,primecell-periphid = <0x000bb922>; coresight-name = "coresight-cti-vmss_cs_cti"; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; qcom,extended_cti; }; mvmss_cti: cti@24991000 { compatible = "arm,coresight-cti", "arm,primecell"; reg = <0x24991000 0x1000>; arm,primecell-periphid = <0x000bb922>; coresight-name = "coresight-cti-mvmss_cti"; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; }; mvmss_internal_cti0: cti@24981000 { compatible = "arm,coresight-cti", "arm,primecell"; reg = <0x24981000 0x1000>; arm,primecell-periphid = <0x000bb922>; coresight-name = "coresight-cti-mvmss_internal_cti0"; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; qcom,extended_cti; }; mvmss_internal_cti1: cti@24982000 { compatible = "arm,coresight-cti", "arm,primecell"; reg = <0x24982000 0x1000>; arm,primecell-periphid = <0x000bb922>; coresight-name = "coresight-cti-mvmss_internal_cti1"; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; qcom,extended_cti; }; };