171 lines
5.3 KiB
C
171 lines
5.3 KiB
C
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/* SPDX-License-Identifier: GPL-2.0 */
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/*******************************************************************************
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* Copyright (c) 2022 ASIX Electronic Corporation All rights reserved.
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*
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* This program is free software: you can redistribute it and/or modify it under
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* the terms of the GNU General Public License as published by the Free Software
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* Foundation, either version 2 of the License, or (at your option) any later
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* version.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
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* FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details
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*
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* You should have received a copy of the GNU General Public License along with
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* this program. If not, see <https://www.gnu.org/licenses/>.
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******************************************************************************/
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#ifndef __ASIX_AX88179A_772D_H
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#define __ASIX_AX88179A_772D_H
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#define AX88179A_BIN_TIMER_UINT 800 //ns
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#define AX88179A_NAPI_WEIGHT 64
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#define AX88179A_BUF_RX_SIZE (48 * 1024)
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#define AX88179A_PHY_ID 0x03
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#define AX88179_GPHY_CTRL 0x0F
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#define AX_GPHY_EEE_CTRL 0x01
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#define AX88179A_HIGH_QUEUE_POINT 0x60
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#define AX88179A_AUTODETACH_DELAY (5UL << 8)
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#define AX88179A_PBUS_REG 0x10
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#define AX88179A_ACCESS_BL 0x2A
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#define AX88179A_PHY_CLAUSE45 0x27
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#define AX88179A_PHY_POWER 0x31
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#define AX_PHY_POWER 0x02
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#define AX88179A_BOOT_TO_ROM 0x9F
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#define AX88179A_AUTODETACH 0xC0
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#define AX88179A_BFM_DATA 0x0E
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#define AX_TX_QUEUE_CFG 0x02
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#define AX_TX_QUEUE_SET 0x08
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#define AX_TX_Q1_AHB_FC_EN 0x10
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#define AX_TX_Q2_AHB_FC_EN 0x20
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#define AX_XGMII_EN 0x80
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#define AX88179A_ETH_TX_GAP 0x0D
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#define AX88179A_FLASH_READ 0x21
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#define AX88179A_FLASH_WEN 0x22
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#define AX88179A_FLASH_WDIS 0x23
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#define AX88179A_FLASH_WRITE 0x24
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#define AX88179A_FLASH_EARSE_ALL 0x25
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#define AX88179A_VLAN_ID_CONTROL 0x2B
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#define AX_VLAN_CONTROL_WE 0x0001
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#define AX_VLAN_CONTROL_RD 0x0002
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#define AX_VLAN_CONTROL_VSO 0x0010
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#define AX_VLAN_CONTROL_VFE 0x0020
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#define AX88179A_MAC_BM_INT_MASK 0x41
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#define AX88179A_MAC_BM_RX_DMA_CTL 0x43
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#define AX88179A_MAC_BM_TX_DMA_CTL 0x46
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#define AX88179A_CLK_EN_ARRAY_1 0x4B
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#define AX_MAC_MII_TX_25M_EN 0x02
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#define AX_MAC_RX_25M_EN 0x08
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#define AX88179A_MAC_CLK_SELECT_1 0x4D
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#define AX_MAC_PCSCLK_MII_TX 0x01
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#define AX88178A_MAC_RX_STATUS_CDC 0x6D
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#define AX88179A_MAC_LSOFC_GMIIPF 0x6E
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#define AX_GMII_CRC_APPEND 0x10
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#define AX_LSOFC_WCNT_1_ACCESS 0x00
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#define AX_LSOFC_WCNT_2_ACCESS 0x01
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#define AX_LSOFC_WCNT_5_ACCESS 0x02
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#define AX_LSOFC_WCNT_7_ACCESS 0x03
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#define AX88179A_MAC_RX_FILTER_CTRL 0x6F
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#define AX_MAC_RX_FILTER_OFT_EN 0x80
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#define AX88179A_MAC_QUEUE_POINT 0x7F
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#define AX88179A_MAC_ARC_CTRL 0x9E
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#define AX88179A_CDC_ECM_CTRL 0xB0
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#define AX88179A_MAC_SWP_CTRL 0xB1
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#define AX88179A_MAC_TX_PAUSE_0 0xB2
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#define AX88179A_MAC_TX_PAUSE_1 0xB3
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#define AX88179A_MAC_TX_PAUSE_2 0xB4
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#define AX88179A_MAC_CDC_DELAY_TX 0xB5
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#define AX88179A_MAC_PATH 0xB7
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#define AX_MAC_RX_PATH_READY 0x01
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#define AX_MAC_TX_PATH_READY 0x02
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#define AX88179A_NEW_PAUSE_CTRL 0xB8
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#define AX_NEW_PAUSE_EN 0x01
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#define AX88179A_MAC_BULK_OUT_CTRL 0xB9
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#define AX_MAC_EFF_EN 0x02
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#define AX88179A_MAC_RX_DATA_CDC_CNT 0xC0
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#define AX88179A_MAC_BFM_CTRL 0xC1
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#define AX_MAC_STOP_EP5_ACCESS 0x01
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#define AX_MAC_STOP_EP3_ACCESS 0x02
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#define AX_MAC_LSO_ERR_EN 0x04
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#define AX_MAC_MIQFFCTRL_FORMAT 0x10
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#define AX_MAC_MIQFFCTRL_DROP_CRC 0x20
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#define AX88179A_MAC_LSO_ENHANCE_CTRL 0xC3
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#define AX_LSO_ENHANCE_EN 0x01
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#define AX88179A_MAC_TX_HDR_CKSUM 0xCC
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#define AX_TXHDR_CKSUM_EN 0x01
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#define AX_TXRX_INDV_RESET_EN 0x02
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#define AX88179A_MAC_CPU_CTRL_MAC_1 0xCE
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#define AX_RX_INDV_RESET 0x01
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#define AX_TX_INDV_RESET 0x02
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#define AX88179A_EP5_EHR 0xF9
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#define AX_EP5_DAT_ERROR_HANDLE 0x80
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#define AX88179A_HW_EC_VERSION 0xFB
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#define AX88179A_SW_REVERSION 0xFC
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#define AX88179A_FLASH_MODE 0x80
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#define PHY_1000M_STS 0x11
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#define LINK_1000M_OK 0x1000
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#define PHY_100M_STS 0x10
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#define LINK_100M_OK 0x1000
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#define PHY_10M_STS 0x16
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#define LINK_10M_OK 0x40
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struct _179a_rx_pkt_header {
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u16 L4_err :1,
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L3_err :1,
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L4_pkt_type :3,
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L3_pkt_type :2,
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CE :1,
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TCO_match :1,
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node_ID_match :1,
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vlan_ind :1,
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rx_ok :1,
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reserved2 :3,
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BMC :1;
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u16 length :15,
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drop :1;
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u16 vlan_tag;
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u16 WUF_detect :1,
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WUF_wake :1,
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WUF_ind :6,
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PTP_ind :1,
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reserved :7;
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};
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struct _179a_rx_header {
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u32 pkt_cnt :13,
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hdr_off :19;
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u32 rx_throughput;
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};
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#define AX88179A_RX_HEADER_SIZE sizeof(struct _179a_rx_header)
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struct _179a_tx_pkt_header {
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u32 length :21,
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checksum :7,
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padding :1,
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vlan_tag :1,
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CPHI :1,
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DICF :1;
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u32 max_seg_size :15,
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reserved :1,
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vlan_info :16;
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};
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#define AX88179A_TX_HEADER_SIZE sizeof(struct _179a_tx_pkt_header)
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#define AX88179A_TX_HERDER_CHKSUM(len) ((tx_hdr->length + \
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(tx_hdr->length >> 8) + \
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((tx_hdr->length >> 16) & 0x1F)) & 0x7F)
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extern const struct net_device_ops ax88179a_netdev_ops;
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extern const struct driver_info ax88179a_info;
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extern const struct driver_info ax88772d_info;
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int ax88179a_siocdevprivate(struct net_device *netdev, struct ifreq *rq,
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void __user *udata, int cmd);
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int ax88179a_ioctl(struct net_device *net, struct ifreq *rq, int cmd);
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void ax88179a_set_multicast(struct net_device *net);
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#endif /* End of __ASIX_AX88179A_772D_H */
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